Authors:

Tieu-Khanh Luong, Van-Tinh Nguyen, Anh-Thai Nguyen, Emanuel Popovici

Publication Type:

Refereed Conference Meeting Proceeding

Abstract:

Stochastic computing (SC) has emerged as a potential alternative to binary computing for a number of low-power embedded systems, DSP, neural networks and communications applications. In this paper, a new method, associated architectures and implementations of complex arithmetic functions, such as exponential, sigmoid and hyperbolic tangent functions are presented. Our approach is based on a combination of piecewise linear (PWL) approximation as well as a polynomial interpolation based (Lagrange interpolation) methods. The proposed method aims at reducing the number of binary to stochastic converters. This is the most power sensitive module in an SC system. The hardware implementation for each complex arithmetic function is then derived using the 65nm CMOS technology node. In terms of accuracy, the proposed approach outperforms other well-known methods by 2 times on average. The power consumption of the implementations based on our method is decreased on average by 40 % comparing to other previous solutions. Additionally, the hardware complexity of our proposed method is also improved (40 % on average) while the critical path of the proposed method is slightly increased by 2.5% on average when comparing to other methods.

Conference Name:

2019 IEEE 30th International Conference on Application-specific Systems, Architectures and Processors (ASAP)

Digital Object Identifer (DOI):

10.1109/ASAP.2019.00018

Publication Date:

15/07/2019

Pages:

281-287

Conference Location:

United States of America

Research Group:

Optimisation & Decision Analytics

Institution:

National University of Ireland, Cork (UCC)

Open access repository:

No